This invention relates generally to metal-oxide-semiconductor (MOS) devices and more particularly to a method for spatially tailoring the surface barrier of MOS devices by means of the scanning electron microscope. The degradation of MOS devices due to ionizing radiation is believed to result from trapping of photogenerated holes near the SiO.sub.2 -silicon interface. These trapped positive charges in the oxide cause the electrostatic potential for electrons at the silicon surface to be lowered. The radiation damage is believed to occur as follows: the ionizing radiation creates electron-hole pairs in the insulator, a photogenerated negative charge flows out of the oxide but the positive charges become trapped near the silicon substrate. An equivalent circuit could be thought of as a first layer of metal considered a gate. A second layer called an oxide trap, the third layer, the silicon dioxide-silicon interface and the final layer the bulk silicon. A shunt resistance connects the bulk silicon with the silicon dioxide-silicon interface. The shunt resistance between the bulk and surface of the substrate represents the surface barrier impedance. This impedance is similar to what one would use to characterize the leakage resistance of a p-n junction. The net effect of ionizing radiation is to deposit a positive charge on the metal plate representing oxide traps.
The radiation effect just described can be quickly annealed out at 500.degree. C. but is eliminated much slower at lower temperatures. In one particular case, the device was seventy percent recovered after ten minutes but still not completely recovered after four hundred minutes. From this, I discovered that it is possible to introduce trapped holes which are stabilized for storage temperatures below 200.degree. C.
With an SEM exposure, it is possible to spatially control the surface barrier of an MOS device. A short anneal at about 300.degree. C. is sufficient to stabilize the surface potential from annealing under typical device operating temperatures.